The present invention relates to a semiconductor circuit, and more particularly to an internal voltage generation circuit which generates an internal voltage corresponding to a reference voltage.
A conventional semiconductor circuit has an internal voltage generation circuit that generates an internal voltage by converting an external voltage in order to improve operation stability. The internal circuit is operated with the generated internal voltage.
Referring to FIG. 1, a conventional internal voltage generation circuit includes a voltage detection unit 10, a driver unit 12, and a voltage distribution unit 14.
In the operation of the internal voltage generation circuit 1, the voltage detection unit 10 compares the reference voltage VREFC with the distribution voltage VDIV to output a control voltage VOUT. The driver unit 12 receives the control voltage VOUT and pumps and outputs the core voltage VCORE. The voltage distribution unit 14 receives the core voltage VCORE and outputs the distribution voltage VDIV.
In other words, when the bank enable signal EN_BANK is enabled, the internal voltage generation circuit 1 compares the reference voltage VREFC with the distribution voltage VDIV, and performs a pumping operation according to the result of the comparison in order to generate a core voltage VCORE at a predetermined level.
Herein, the bank enable signal EN_BANK, which is a signal output from a command decoder (not shown), is continuously enabled while a precharge command is performed, which occurs after an active command is performed.
Meanwhile, a semiconductor circuit should secure operation stability for an external voltage VDD within a predetermined range (for example, within 1.8V to 1.2V when the operation voltage is 1.5V).
However, the conventional internal voltage generation circuit 1 is controlled by a bank enable signal EN_BANK with an enable pulse that has a fixed width regardless of the external voltage VDD. Therefore, a problem occurs in that it is difficult to output the internal voltage in a stable manner at a high voltage HIGH _VDD (1.8V) and a low voltage LOW_VDD (1.2V).
In other words, when the internal voltage generation circuit 1 is driven at high voltage HIGH_VDD (1.8V), current drivability is increased excessively in order to overdrive the internal voltage while the bank enable signal EN_BANK is enabled. The excessive increase in current drivability causes a problem in that current consumption is increased.
When the internal voltage generation circuit 1 is driven at low voltage LOW_VDD (1.2V), a problem occurs, in that the predetermined level of internal voltage cannot be restored while the bank enable signal EN_BANK is enabled.
In particular, under circumstances where the semiconductor circuit is used as a main component for various portable products, and is operated at gradually reduced operation voltage, a problem occurs in that as the threshold voltage Vt characteristic of the transistor is deteriorated, resulting in the deterioration of the current drivability of the internal voltage generation circuit 1.